The present invention relates to a method for forming electrical contacts on grooved semiconductor devices, and more particularly to a method for forming a contact automatically aligned within a groove.
Grooved semiconductor devices generally comprise a substantially planar semiconductor substrate having a surface which includes one or more grooves. Devices such as semiconductor field effect transistors (FETs) can incorporate grooves within which electrical contact to a source, drain or gate region is made. In a vertical metal oxide semiconductor (VMOS) FET, for example, as described in copending application Ser. No. 089,315, filed Oct. 30, 1979, a groove might intercept the device body region and the gate contact might be delineated within the groove. To optimize device performance the contact should be precisely delineated within its groove. However, the three dimensional nature of the grooved semiconductor surface can make this precise delineation difficult to achieve.